Digital system components are typically implemented in an integrated circuit (IC) chip. Within the IC chip, the operation of an IC is regulated by a system clock, which is one of the fundamental components of a digital system (e.g., computer system). The system clock signal is generally a rectangular pulse train or square wave. In a synchronous digital system, the system clock determines the exact times at which an output can change states. Hence, the output of a digital system depends largely on the accuracy and integrity of the system clock.
The integrity of the output depends largely on whether the system clock signal is generated in an operable or non-operable frequency. A system clock signal that is generated at a non-operable frequency causes internal timing problems that will affect the integrity of the output. Typically, a low frequency monitor is used to ensure that the system clock signal does not fall below a minimum acceptable operating frequency. Conversely, a high frequency monitor is used to ensure that the system clock signal does not rise above a maximum acceptable operating frequency. By using a low frequency monitor and a high frequency monitor in combination, the system clock signal is monitored to ensure that the clock signal is being generated within a window of valid operating frequencies.
Conventional frequency monitor circuits are designed to monitor only a specific frequency. Therefore, a low frequency monitor designed to monitor, for example, a clock signal having an anticipated low frequency of 8 MHz could not be used in a processor or other part in which the low operating frequency is for example, 2 MHz. Similarly, a conventional high frequency monitor designed to monitor, for example, a clock signal having an anticipated high frequency of 16 MHz would not be well suited for use with a processor or other part in which the high operating frequency is substantially higher than 16 MHz. Therefore, often when using conventional frequency monitors, a separate frequency monitor must be designed for each respective high and low operating frequency of each processor or part being monitored. It will be understood that conventional frequency monitor circuits require extensive redesign to realize different frequencies. Thus, conventional frequency monitors are extremely inflexible, are functionally limited, and can add significant additional design and implementation costs.
As yet another drawback, actual operating characteristics of conventional frequency monitors can also vary from the expected or intended operating characteristics. For example, even when the frequency monitor is designed to monitor a specific known frequency, process variations, operating conditions, and the like may alter the actual performance of the frequency monitor. Hence, even a "properly" designed frequency monitor can deviate from its intended operating characteristics in such a manner as to render the frequency monitor unreliable or useless.
As still another drawback, conventional frequency monitors are not able to precisely determine the actual low or high operating frequency of a given processor or part. More specifically, conventional frequency monitors are designed only to monitor a specific frequency, and do not quantitatively provide information as the current high or low operating frequency of the clock signal being monitored.
Thus, a need exists for frequency monitor which is not limited to solely monitoring a specific frequency. A further need exists for a frequency monitor which can readily monitor a variety of clock signal frequencies associated with various processors or integrated circuit parts. Still another need exists for a frequency monitor which is still reliable and is useful even when subjected to process variations and various operating conditions. Also, a need exists for a frequency monitor which can be used to determine the current operating frequency of a clock signal being monitored.